[Ktechlab-devel] Fwd: [ktechlab:bugs] #26 p-MOSFET transistors
Zoltan Padrah
zoltan.padrah at gmail.com
Wed Nov 4 13:11:09 UTC 2015
FYI
---------- Forwarded message ----------
From: Zoltan P <zoltan_padrah at users.sf.net>
Date: 2015-11-04 15:08 GMT+02:00
Subject: [ktechlab:bugs] #26 p-MOSFET transistors
To: "[ktechlab:bugs]" <26 at bugs.ktechlab.p.re.sf.net>
I have investigated this issue, and for p-MOSFET there is always a
leakage of about 10uA. For now, I think this is a low-priority issue,
because (1) there are more urgent things to fix, like redrawing
issues, and (2) it can be worked around from circuits.
Also I have looked into the code, and... it will take a while to
understand it. There are no obvious bugs, but also no unit tests.
The CMOS inverter will output about 127mV, which is way below its
threshold voltage, so when 2 CMOS inverters are connected in series,
if the input of the first one is 5V, then the output of the second one
will be also 5V.
Of course there could be cases when this leakage is a big issue, but
currently I don't know about any.
Al always, any feedback is welcome.
________________________________
[bugs:#26] p-MOSFET transistors
Status: open
Group: v1.0 (example)
Labels: p-MOSFET
Created: Mon Sep 28, 2015 10:31 AM UTC by Joan Vidal
Last Updated: Sun Oct 18, 2015 06:35 PM UTC
Owner: nobody
There is no way for p-MOSFET transistors to stop conducting, there is
always a small current flowing. Try a CMOS inverter for example, there
is no way to get 0V out.
________________________________
Sent from sourceforge.net because you indicated interest in
https://sourceforge.net/p/ktechlab/bugs/26/
To unsubscribe from further messages, please visit
https://sourceforge.net/auth/subscriptions/
More information about the Ktechlab-devel
mailing list