[Ktechlab-devel] Elements

[P Zoltan]

  A quick reply to the last part:

On Thu, 01 Apr 2010 07:01:05 +0200, Alan Grimes <agrimes at speakeasy.net>  
wrote:

>
> Another important consideration regarding that class is the
> implementation of the very important tri-state logic...


  In my opinion, the tri-state logic outputs could be modeled in a very  
similar way to the normal logic outputs, but with a variable (low or very  
large) output resistance.

  The simulator should be able to determine if the logic configuration is  
correct (one output driving more inputs), or not (more outputs connected).  
In the case of correct configuration, the simulation would be done in  
digital domain; if it's not, the output impedance of the logic should be  
considered, and the node should be an analogic one.

  In the case of tri-state logic, if we want to simulate the circuit in a  
physically accurate way, the nodes where tri-state logic is corrected,  
should be always analog.

  A faster method would be to test for each node if the logic outputs  
connected to it have the "correct" configuration (one low impedance and  
all the other are high), and if that's the case, threat the node as it  
would be digital. This might cause discontinuities in the voltage on the  
node (in real world thing like that don't happen).

  What do you think?