[Ktechlab-devel] [bug] Ecclockinput won't go above 1khz.

[Alan Grimes]

P Zoltan wrote:
>   Isn't the problem caused by the fact that the simulator has only 1kHz  
> step frequency? We should separate the real-world time pass speed  
> (simulator step at 1kHz) and the time flowing inside the circuit. This way  
> by "slowing" the time inside the circuit, we could simulate circuits at  
> any frequency.

Here are the known limits:

linear update rate: 10khz, (1e4 in the code).

As a function of the linear update rate, the analog signal generators
are limited to 1khz.

The logic update rate is about a hundred times faster (1e6). The natural
limit of a logic clock is therefore 5e5. But its current limit appears
to be 1e4. =\


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